EC3352 Digital Systems Design Notes
Download EC3352 Digital Systems Design Books, Lecture Notes, Part-A 2 marks with answers, Part-B 16 marks Questions, PDF Books. In this Notes Very Useful for Second Year Third Semester Students.
“EC3352 Digital Systems Design Books”
“EC3352 Digital Systems Design Lecture Notes”
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“EC3352 Digital Systems Design Notes”
Subject Info:
| Semester | Third Semester |
| Department | ECE |
| Year | Second Year |
| Regulation | R 2021 |
| Subject Code / Name | EC3352 Digital Systems Design |
| Content | Local Authors Books, Lecture Notes |
Syllabus:
EC3352 Digital Systems Design
UNIT I BASIC CONCEPTS
Review of number systems-representation-conversions, Review of Boolean algebra- theorems, sum of product and product of sum simplification, canonical forms min term and max term, Simplification of Boolean expressions-Karnaugh map, completely and incompletely specified functions, Implementation of Boolean expressions using universal gates, Tabulation methods.
UNIT II COMBINATIONAL LOGIC CIRCUITS
Problem formulation and design of combinational circuits – Code-Converters, Half and Full Adders, Binary Parallel Adder – Carry look ahead Adder, BCD Adder, Magnitude Comparator, Decoder, Encoder, Priority Encoder, Mux/Demux, Case study: Digital trans-receiver / 8 bit Arithmetic and logic unit, Parity Generator/Checker, Seven Segment display decoder
UNIT III SYNCHRONOUS SEQUENTIAL CIRCUITS
Latches, Flip flops – SR, JK, T, D, Master/Slave FF, Triggering of FF, Analysis and design of clocked sequential circuits – Design – Moore/Mealy models, state minimization, state assignment, lock – out condition circuit implementation – Counters, Ripple Counters, Ring Counters, Shift registers, Universal Shift Register. Model Development: Designing of rolling display/real time clock
UNIT IV ASYNCHRONOUS SEQUENTIAL CIRCUITS
Stable and Unstable states, output specifications, cycles and races, state reduction, race free assignments, Hazards, Essential Hazards, Fundamental and Pulse mode sequential circuits, Design of Hazard free circuits.
UNIT V LOGIC FAMILIES AND PROGRAMMABLE LOGIC DEVICES
Logic families- Propagation Delay, Fan – In and Fan – Out – Noise Margin – RTL, TTL, ECL, CMOS – Comparison of Logic families – Implementation of combinational logic/sequential logic design using standard ICs, PROM, PLA and PAL, basic memory, static ROM, PROM, EPROM, EEPROM EAPROM.